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Cellular wave computing via nanoscale chip architectures

机译:通过纳米级芯片架构进行细胞波计算

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摘要

Nanoscale electronic technologies, both CMOS-based and beyond, provide the means to fabricate massively parallel systems with thousands or millions of processors/cores in a small package. Most of these architectures are in prototype stage. Owing to physical constraints the cellular property prevails: they have blocks of mainly identical processing cells in arrays, and the precedence of geometric locality is mandatory. The cells might vary both in function as well as in their modes of operation, including arithmetic/analog, logic and symbolic cells, possibly with integrated sensory elements. The interplay between local dynamics and global dynamics plays an increasingly important role. Cellular wave computers rely on this architecture endowed with a new world of algorithms based on spatial-temporal dynamics as protagonist instructions.
机译:纳米级的电子技术,无论是基于CMOS的技术,还是基于CMOS的技术,都提供了以小封装制造具有数千或数百万个处理器/内核的大规模并行系统的方法。这些架构大多数都处于原型阶段。由于物理限制,细胞特性占优势:它们在阵列中具有基本上相同的处理单元块,并且几何局部性的优先级是强制性的。这些单元可能在功能以及它们的操作模式上都不同,包括算术/模拟,逻辑和符号单元,可能还带有集成的传感元件。局部动力学和全局动力学之间的相互作用起着越来越重要的作用。蜂窝波计算机依赖于这种体系结构,赋予其新的算法世界,这些算法基于时空动态作为主角指令。

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  • 作者单位

    Hungarian Academy of Sciences and Pazmany Peter Catholic Univeristy, Budapest, Hungary;

    rnSZTAKI, Hungarian Academy of Sciences and Pazmany University, Budapest, Hungary;

    rnIBM, T. J. Watson Research Center, New York, U.S.A;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《化学文摘》(CA);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
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  • 入库时间 2022-08-18 01:01:50

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