机译:MOS电流模式逻辑环形振荡器的振荡频率,幅度和相位噪声的数值模型
Department of Electrical, Mechanical and Management Engineering, University of Udine, via delle Scienze 208, 33100 Udine, Italy;
rnDepartment of Electrical, Mechanical and Management Engineering, University of Udine, via delle Scienze 208, 33100 Udine, Italy;
rnDepartment of Electrical, Mechanical and Management Engineering, University of Udine, via delle Scienze 208, 33100 Udine, Italy;
rnDepartment of Electrical, Mechanical and Management Engineering, University of Udine, via delle Scienze 208, 33100 Udine, Italy Now with Infineon Technologies, Villach, Austria;
rnDepartment of Electrical, Mechanical and Management Engineering, University of Udine, via delle Scienze 208, 33100 Udine, Italy;
rnDepartment of Electrical, Mechanical and Management Engineering, University of Udine, via delle Scienze 208, 33100 Udine, Italy;
oscillators; phase-noise; MOS-current-mode-logic; simulation;
机译:具有粗调和细调的10 GHz CMOS环形振荡器的设计和频率/相位噪声分析
机译:采用自动振幅控制的非线性MEMS振荡器的状态空间相位噪声模型
机译:非线性分数振荡器强制振荡的幅度频率和相位频率性能
机译:高频差分环形振荡器的振荡频率和波形幅度分析
机译:温度补偿的高频MEMS-CMOS参考振荡器的设计和相位噪声建模。
机译:神经元振荡中的幅度耦合量化:锁相值,平均矢量长度,调制指数和广义线性建模跨频耦合的比较
机译:通过增加振荡幅度来降低CMOS环形振荡器中1 / f噪声引起的相位噪声