A method for fast simulation of multiple catastrophic faults in analogue circuits

摘要

The paper offers an efficient method for simulation of multiple catastrophic faults in linear AC circuits. The faulty elements are either open circuits or short circuits. The method exploits the well-known Householder formula in matrix theory to find the node voltages deviations due to the perturbations of some circuit elements. The main achievement of the paper is a systematic method for performing the simulation of all combinations of the multiple catastrophic faults. The method includes two new procedures enabling us to find very efficiently the node impedance matrix of the nominal circuit and inverses of some matrices corresponding to different fault combinations. The procedures are the crucial point of this approach and make it very efficient. Consequently, the amount of the computing power needed to carry out all the simulations is significantly reduced. Numerical examples illustrating the proposed approach are provided.