A timing-driven floorplanning algorithm wih the Elmore delay model for building block layout

摘要

This paper presents a timing-driven floorplanning algorithm for building block layout. As the itnerconnection delay model, the proposed algorithm adopts the Elmore delay model. The algooithm consists of two phases. In the first pahse, a timing-driven topological arrangement of blocks is generated with the resolution of overlap among blocks using nonlinear programming udner the timing constraints. In the second one, the algorithm performs floorplan sizing which determines the sizes and he shapes of blocks based on the topological arrangement obtained in the first pahse so as to minimze the chip area, and obtains a legal floorplan. This phase is based on the topological constraint manipulation. Through the experimental results, the proposed algorithm can produce results without any timing violations within a practical computation time.