Digital Domain Measurement and Cancellation of Residue Amplifier Nonlinearity in Pipelined ADCs

摘要

Digital correction and calibration techniques have been extensively used to cancel linear circuit imperfections in pipelined analog-to-digital converters (ADCs). The self-calibration technique proposed in this paper provides a means of measuring and canceling nonlinear errors of interstage amplifiers in the digital domain. The calibration of nonlinearity coefficients is based on pseudorandom signal modulation and evaluation of digital code histograms. The scheme does not introduce additional precision hardware or test signals and operates in the background without interrupting normal converter operation. The simulation results of a 12-bit ADC show that the calibration is capable of improving the effective number of bits from 7 to 11.8 while achieving parameter adaptation time constants on the order of 100 ms at a sampling rate of 100 MS/s.