An Iterative Improvement Method for Generating Compact Tests for IDDQ Testing of Bridging Faults

摘要

IDDQ testing, or current testing, is a powerful method which detects a large class of defects which cause abnormal quiescent current, by measuring the power supply current. One of the problems on IDDQ testing which prevent its full practical use in manu- facturing is that the testing speed is slow owing to time-consuming IDDQ measurement. One of the solutions to this problem is test pat- tern compaction. This paper presents an efficient method for generat- ing a compact test set for IDDQ testing of bridging faults in combina- tional CMOS circuits.