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On Testing of Josephson Logic Circuits Composed of the 4JL Gates

机译:关于由4JL门构成的约瑟夫森逻辑电路的测试

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摘要

We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage an current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.
机译:我们指定了具有四个约瑟夫森结的电流注入逻辑门的典型制造缺陷(4JL栅极),然后通过SPICE仿真研究了缺陷栅极的电压和电流行为,以评估通过逻辑测试和电流测试实现的缺陷覆盖率。仿真结果表明,当前的测试可能会实现较高的缺陷覆盖率,而逻辑测试无法检测到几乎一半的缺陷。

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