机译:易于测试的路由架构和原型芯片
Graduate School of Science and Technology, Kumamoto University, Kumamoto-shi, 860-8555 Japan;
Graduate School of Science and Technology, Kumamoto University, Kumamoto-shi, 860-8555 Japan;
Graduate School of Science and Technology, Kumamoto University, Kumamoto-shi, 860-8555 Japan;
Graduate School of Science and Technology, Kumamoto University, Kumamoto-shi, 860-8555 Japan;
ROHM Co., Ltd., Kyoto-shi, 615-8585 Japan;
ROHM Co., Ltd., Kyoto-shi, 615-8585 Japan;
ROHM Co., Ltd., Kyoto-shi, 615-8585 Japan;
Graduate School of Science and Technology, Kumamoto University, Kumamoto-shi, 860-8555 Japan;
design for testability; homogeneous architecture; test method; prototype chip;
机译:易于测试的路由架构和原型芯片
机译:芯片原型制作基板:灵活的仿真和测试架构(FAST)
机译:轻松适应多核处理器的片上调试架构
机译:易于测试的路由架构和高效的测试技术
机译:用于多核架构的容错网络片式路由器架构
机译:图案化的纳米孔碳的直接原型:从材料到芯片上设备的一条路线
机译:易于可测试的路由架构和原型芯片