A Low Temperature DC Characteristic Analysis Utilizing a Floating Gate Neuron MOS Macromodel

摘要

Utilizing a macromodel which calculates the floating gate potential by combining resistances and dependent voltage and current sources, DC transfer characteristics for multi-input neuron MOS inverters and for those in the neuron MOS full adder circuit are simulated both at room temperature and at 77K. Based on the simulated results, low temperature circuit failures are discussed. Furthermore, circuit design parameter optimization both for low and room temperature operations is described.