A 0.8-V Syllabic-Companding Log Domain Filter with 78-dB Dynamic Range in 0.35-μm CMOS

摘要

A scheme for a low-voltage CMOS syllabic-companding log domain filter with wide dynamic range is proposed and its prototype is presented. A nodal voltage which is fixed in a conventional filter based on the dynamically adjustable biasing (DAB) technique is adapted for change of input envelope to achieve wide dynamic range. Externally linear and time invariant (ELTI) relation between an input and an output is guaranteed by a state variable correction (SVC) circuit which is also proposed for low-voltage operation. To demonstrate the proposed scheme, a fifth-order Chebychev low-pass filter with 100-kHz cutoff frequency is designed and fabricated in a standard O.35-μm CMOS process. The filter has a 78-dB dynamic range and consumes 200-μW power from a 0.8-V power supply.