机译:面积为0.5 V的高效变压器折叠共源共栅CMOS低噪声放大器
Division of Electrical, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita-shi, 565-0871 Japan;
Division of Electrical, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita-shi, 565-0871 Japan;
Division of Electrical, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita-shi, 565-0871 Japan;
Division of Electrical, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita-shi, 565-0871 Japan;
Division of Electrical, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita-shi, 565-0871 Japan;
Division of Electrical, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita-shi, 565-0871 Japan;
CMOS; low-noise amplifier (LNA); low voltage; transformer;
机译:使用紧凑型基于变压器的级间网络的1-13 GHz CMOS低噪声放大器
机译:采用90 nm CMOS的超低功耗变压器反馈60 GHz低噪声放大器
机译:90nm CMOS中的超低功耗变压器反馈60 GHz低噪声放大器
机译:0.5V区域高效的变压器折叠式CASCODE低噪声放大器在90nm CMOS中
机译:用于0.18微米CMOS中5--6GHz WLAN的1V变压器反馈低噪声放大器。
机译:电容式微加工超声换能器的全差分折叠式共源共栅前端接收器放大器集成电路
机译:采用90纳米CmOs的超低功耗变压器 - 反馈60 GHz低噪声放大器