机译:采用0.13μmCMOS的低抖动,高面积效率,基于LC-VCO的时钟发生器
Department of Electrical Engineer-ing, KAIST, Daejeon, Korea;
System LSI Division, Samsung Elec-tronics CO., Yongin, Korea;
Department of Electrical Engineer-ing, KAIST, Daejeon, Korea;
Department of Electrical Engineer-ing, KAIST, Daejeon, Korea;
Department of Electrical Engineer-ing, KAIST, Daejeon, Korea;
clock generator; LC-VCO; area-efficient LC-VCO;
机译:50.1–53-GHz时钟发生器,在0.13-μmCMOS中使用谐波锁定的PD
机译:50.1–53-GHz时钟发生器,在0.13-μmCMOS中使用谐波锁定的PD
机译:采用0.13-μmCMOS技术的1.2V 37-38.5GHz八相时钟发生器
机译:采用55nm CMOS的带宽跟踪自偏置5至2800 MHz低抖动时钟发生器
机译:用于时钟发生器的低抖动PLL,具有使用DC-DC电容转换器的对电源噪声不敏感的VCO。
机译:适用于AlN PMUT阵列的微型0.13μmCMOS前端模拟
机译:基于3.3V,1.6GHz,低抖动,自校正DLL的0.5μmCmOs时钟合成器。