A High Fundamental Frequency Sub-THz CMOS Oscillator With a Capacitive Load Reduction Circuit

摘要

This article presents a high fundamental frequency subterahertz (sub-THz) CMOS oscillator with a single core. The proposed structure with a capacitive load reduction circuit increases the fundamental oscillation frequency by decreasing the parasitic capacitances of the buffer transistor and inductor and minimizing the loss caused by the gate resistance of the buffer stage. To achieve high output power, the proposed oscillator combines the differential output signals through a differential-to-single (DTS) transformer. A push-push oscillator based on the high fundamental frequency oscillator is also introduced to increase the operating frequency further. The proposed oscillators are implemented in a 65-nm CMOS process. Measurements of the fundamental oscillator reveal an output power of 0.285 mW at 251 GHz, while consuming 21 mA from a 1.3-V supply voltage. The measured operating frequency of the push-push oscillator is 432 GHz.