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Nonvolatile Boolean Logic Block Based on Ferroelectric Tunnel Memristor

机译:基于铁电隧道忆阻器的非易失布尔逻辑块

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Thanks to the progress in nonvolatile (NV) devices, such as magnetic tunnel junctions and phase change memories, various NV logic blocks have recently been proposed to overcome energy/delay bottlenecks caused by von Neumann computing architecture. The ferroelectric tunnel memristor (FTM) is an emerging NV multilevel device and was recently reported to show excellent performance. In this paper, we demonstrated that the short-circuit effect in an FTM provides the opportunity to design a novel FTM-based Boolean logic block. This block is composed of an FTM and a load resistor. Unlike classical schemes, where at least two cells are required as operands, our FTM-based block implements logic operation inside a single memristor. With a compact model of an FTM, transient simulation is performed to validate NAND and NOR logic functions. Finally, we provide the method of performance optimization and discuss the advantages/disadvantages of the proposed logic block to summarize our work.
机译:由于非易失性(NV)设备的发展,例如磁隧道结和相变存储器,最近提出了各种NV逻辑块来克服由冯·诺依曼计算架构引起的能量/延迟瓶颈。铁电隧道忆阻器(FTM)是一种新兴的NV多级器件,据报道最近表现出出色的性能。在本文中,我们证明了FTM中的短路效应为设计新颖的基于FTM的布尔逻辑块提供了机会。该模块由FTM和负载电阻组成。与经典方案不同,在经典方案中,至少需要两个单元作为操作数,我们基于FTM的模块在单个忆阻器内实现逻辑运算。利用FTM的紧凑模型,可以执行瞬态仿真以验证NAND和NOR逻辑功能。最后,我们提供了性能优化的方法,并讨论了所提出的逻辑块的优缺点,以总结我们的工作。

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