机译:基于铁电隧道忆阻器的非易失布尔逻辑块
Inst. d'Electron. Fondamentale (IEF), Univ. Paris-Sud, Orsay, France;
Boolean functions; ferroelectric devices; logic circuits; logic gates; magnetic tunnelling; memristors; phase change memories; random-access storage; FTM; NAND logic functions; NOR logic functions; NV multilevel device; Neumann computing architecture; ferroelectric tunnel memristor; load resistor; magnetic tunnel junctions; nonvolatile Boolean logic block; performance optimization method; phase change memories; short-circuit effect; transient simulation; Computer architecture; Logic gates; Magnetic tunneling; Memristors; Programming; Resistance; Simulation; Detection window; ferroelectric domain; ferroelectric tunnel memristor (FTM); nonvolatile (NV) Boolean logic;
机译:基于低功耗混合忆阻器CMOS的二元逻辑非易失性SRAM单元的设计与分析
机译:基于低功耗混合忆阻器CMOS的二元逻辑非易失性SRAM单元的设计与分析
机译:基于忆阻器的布尔逻辑运算和计算电路
机译:新兴的基于存储器和忆阻器的电路面临的挑战:非易失性逻辑,物联网安全,深度学习和神经形态计算
机译:铅锆钛氧化物基铁电非易失性存储器。
机译:铁电栅极场效应晶体管的最新进展及其在非易失性逻辑和FeNAND闪存中的应用
机译:基于2D室温铁电α-IN2SE3和WSE2的非挥发性椎间体基于异质结构