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High-Performance Modulators and Switches for Silicon Photonic Networks-on-Chip

机译:硅光子片上网络的高性能调制器和开关

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摘要

The stringent on- and off-chip communications demands of future-generation chip multiprocessors require innovative and potentially disruptive technology solutions, such as chip-scale photonic transmission systems. A space-switched, wavelength-parallel photonic network-on-chip has been shown to equip users with high-bandwidth, low-latency links in an energy-efficient manner. Here, experimental measurements on fabricated silicon photonic devices verify a large set of the components needed to construct these networks. The proposed system architecture is reviewed to motivate the demanding performance requirements of the components. Then, systems-level investigations are delineated for multiwavelength electrooptic modulators and photonic switching elements arranged in 1 $times$ 2, 2 $times$ 2, and 4 $times$ 4 formations. Compact ( $sim$10 $mu$m), high-speed (4 Gb/s) modulators, having a large degree of channel scalability (four channels demonstrated), are demonstrated with excellent data integrity (bit error $hbox{rates (BERs)} {u0003C;}hbox{10}^{-12}$). Meanwhile, switches are shown to transfer extensive throughput bandwidths (250 Gb/s) with fast switching speeds (u0003C;1 ns) and sufficient extinction ratios (>10 dB). Data integrity is also verified for the switches ($hbox{BERs} u0003C; hbox{10}^{-12}$) with power penalty measurements amid dynamic operation. These network component demonstrations verify the feasibility of the proposed system architecture, while previous works have -nverified its efficacy.
机译:下一代芯片多处理器的严格的片上和片外通信需求需要创新的,可能具有破坏性的技术解决方案,例如芯片级光子传输系统。一种空间交换的,波长平行的光子片上网络已被证明可以以高能效的方式为用户配备高带宽,低延迟的链路。在这里,对制造的硅光子器件的实验测量证明了构建这些网络所需的大量组件。对提出的系统架构进行了审查,以激发组件的苛刻性能要求。然后,对以1乘2,2乘2和4乘4排列的多波长电光调制器和光子开关元件进行了系统级的研究。具有高度通道可扩展性的紧凑型($ sim $ 10 $ mu $ m)高速(4 Gb / s)调制器(演示了四个通道),具有出色的数据完整性(位错误$ hbox {rates(BERs) )} {u0003C;} hbox {10} ^ {-12} $)。同时,交换机显示出以快速的切换速度(u0003C; 1 ns)和足够的消光比(> 10 dB)传输广泛的吞吐量带宽(250 Gb / s)。还可以在动态操作期间通过功率损失测量来验证交换机($ hbox {BERs} u0003C; hbox {10} ^ {-12} $)的数据完整性。这些网络组件演示验证了所提出的系统架构的可行性,而先前的工作已验证了其有效性。

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