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Coarse grid acceleration of a parallel block preconditioner

机译:并行块预处理器的粗网格加速度

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摘要

A block preconditioner is considered in a parallel computing environment. This preconditioner has good parallel properties, however, the convergence deteriorates when the number of blocks increases. Two different techniques are studied to accelerate the convergence: overlapping at the interfaces and using a coarse grid correction. It appears that the latter technique is indeed scalable, so the wall clock time is constant when the number of blocks increases. Furthermore, the method is easily added to an existing solution code.
机译:在并行计算环境中考虑了块预处理器。该预处理器具有良好的并行性能,但是,当块数增加时,收敛性会降低。研究了两种不同的技术来加速收敛:在界面处重叠和使用粗网格校正。似乎后一种技术确实是可扩展的,因此当块数增加时,挂钟时间是恒定的。此外,该方法很容易添加到现有解决方案代码中。

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