Hybrid DDS-PLL Frequency Synthesizer with Reference Clock Modulation

摘要

A scheme of frequency synthesizer with radio frequency modulation using reference clock is proposed, implemented and tested. The synthesizer is based on direct digital synthesis (DDS) and phase locked loop (PLL). The proposed hybrid scheme offers a new approach in frequency modulation of the DDS output signal by modulating the signal used as a reference clock for DDS. The results of measurement confirm a high performance of the proposed scheme.