Combining Logic BIST and Scan Test Compression

摘要

mall geometries have projected IC technology into an era where test has become.a crucial part in the chip design process and have introduced new challenges needing solutions that use already available resources. Currently, two distinct test methodologies are used to address the ever-increasing pressure to reduce the cost of manufacturing test, efficiently use test equipment, and increase yield. One of the methodologies commonly used is logic built-in self-test (LBIST). LBIST technology inserts embedded logic for a self-contained test. It provides a fully integrated test solution that can be used at any test step or level of integration with a simple interface.The logic insertion, problem logic fixes, and test points for high-quality test are fully automated. LBIST uses pseudorandom pattern generation (PRPG) and multiple input signature registers (MISRs), and detection of unmodeled faults is covered by using high multiple-detection pseudorandom vectors.