首页> 外文期刊>Evaluation Engineering >Multiple Area-Array Devices Challenge Wafer Probing
【24h】

Multiple Area-Array Devices Challenge Wafer Probing

机译:多个面阵器件挑战晶圆探测

获取原文
获取原文并翻译 | 示例
       

摘要

The total cost of test is the overriding consideration driving changes in probing technology. Memories are not the only devices being tested; but because their pricing is so competitive, test costs must be controlled closely. Dataquest's recent DRAM cost model estimates that 16-Mb DRAM manufacturers spend about $ 1 per good device in test and packaging, but that 64-Mb DRAM manufacturers spend nearly $5. As memories get larger, they require only a few more connections, but their test time goes up linearly with density. According to Mark Brandemuehl, director of probe card marketing at FormFactor, "Probe test times for DRAMs have increased to minutes per wafer touchdown with the 64-Mb generation and will exceed 10 minutes for early 256-Mb devices. The only way to counter this trend is to test a higher number of devices per touchdown."
机译:测试的总成本是驱动探测技术变化的首要考虑因素。内存并不是唯一要测试的设备;但是由于它们的价格如此具有竞争力,因此必须严格控制测试成本。 Dataquest最近的DRAM成本模型估计16-Mb DRAM制造商在测试和封装中每个好的设备花费约1美元,而64-Mb DRAM制造商花费近5美元。随着存储器变大,它们仅需要几个连接,但是它们的测试时间随密度线性增加。 FormFactor探针卡市场总监Mark Brandemuehl表示:“对于64 Mb的一代产品,DRAM的探针测试时间已增加至每片晶圆触及数分钟,而对于早期的256 Mb器件,其探针测试时间将超过10分钟。趋势是每次触地测试更多设备。”

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号