Serial architectures for the implementation of 2-D digital filters and for template matching in digital images

摘要

Serial architectures are derived for the hardware realization of two-dimensional (2-D) digital filters (IIR and FIR), and for the implementation of template matching in digital images. The architectures utilizes two's-complement representation and table look-up techniques. The contents of the lookup tables is generated via hardware from the filter coefficients. The architectures require a modest amount of hardware, and could be suitable for VLSI implementation.