With many analogue-to-digital converters (ADCs) available for designers to choose from today, an important parameter to consider is the type of digital data outputs provided. Currently, the three most common types of digital outputs used by high-speed converters are CMOS, low-voltage differential signalling (LVDS) and current-mode logic (CML). In ADCs with sample rates below 200MSPS, it is common to find CMOS digital outputs. A typical CMOS driver consists of two transistors - NMOS and PMOS - connected between power supply (VDD) and ground; see Figure 1a. This structure results in output inversion, so, to avoid that, it's best to use the back-to-back arrangement of Figure 1b. The CMOS output-driver's input is high impedance whilst its output is low impedance. At its input, the impedance of the gates of the two CMOS transistors is quite high (ranging from kΩ to MΩ) since the gate is isolated from any conductive material by the gate oxide. At the driver's output, the impedance is governed by drain current, I_D, which is typically small, in this case lower than a few hundred ohms.
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