Novel systolic array realisation of allpass digital filters for high speed applications

摘要

A novel systolic array realisation of a general allpass digital filter of any arbitrary order suitable for high speed delayed N-path recursive digital filtering applications is presented. The proposed systolic array is a purely systolic (not semisystolic) design which is also canonic in the number of multipliers, modulator in having one type of basic cell, and has nearest neighbour interconnections.