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Novel recursive algorithm and highly compact semisystolic architecture for high throughput computation of 2-D DHT

机译:新型递归算法和高度紧凑的半收缩体系结构,可实现二维DHT的高通量计算

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摘要

A recursive algorithm and a fully pipelined semisystolic CORDIC architecture for computing the 2-D discrete Hartley transform are proposed. The proposed architecture has nearly eight times the throughput rate and requires nearly (1/8)th the chip area compared with the existing CORDIC architecture.
机译:提出了一种用于二维离散Hartley变换的递归算法和全流水线半收缩CORDIC架构。与现有的CORDIC体系结构相比,拟议的体系结构的吞吐速率几乎是其八倍,并且需要的芯片面积接近(1/8)。

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