Low-voltage balanced transconductor with high input common-mode rejection

摘要

A balanced transconductor architecture with a high input common-mode (CM) rejection and capable of operating with low supply voltage is proposed. The novel structure is based on a feedforward cancellation of the input CM signal, implemented with an additional transconductor sensitive only to CM signals. A BiCMOS circuit implementation of the structure is presented. Comparative simulations show that the proposed technique is competitive with the classical fully-differential architecture particularly at high frequency when the CMRR degrades.