Dual-metastability FPGA-based true random number generator

摘要

A novel concept of a true random number generator (TNRG) based on two metastable flip-flops in a FPGA circuit is introduced. Most of metastable based TRNG solutions are based on the assumption of a D-latch (flip-flop) state's uncertainty which is the source of randomness. In the proposed approach direct proximity of the metastable point is not necessary. Difference of the time of response of a pair of nearly metastable flip-flops lies upon the proposed circuit's principle of operation. It can be implemented in common programmable FPGA or CPLD circuits ensuring randomness quality-passing NIST, Diehard and Matlab tests.