FPGA coding scheme holds promise for comms

摘要

Manhasset, N.Y. — Researchers at the University of Alberta have successfully implemented a form of low-density parity-check (LDPC) coding on FPGAs that could greatly enhance the architectural efficiency of streaming data and packet-switched systems, such as those designed for voice-over-Internet Protocol or Ethernet. Called LDPC convolutional coding, the scheme eschews the strictures and inefficiencies of LDPC block coding now in proposal before IEEE 801.16, 802.11n and 801.3an, and uses instead a flexible scheme that adapts to real-world variations in the frame sizes of typical wireless and wireline protocols, the researchers said. LDPC block codes are weaving their way into many protocols and have been shown to achieve near-capacity performance over noisy channels, bringing communications designers closer to the classic Shannon Limit that defines a medium's capacity.