Methodology sought for assertion-based verification

摘要

Santa Clara, Calif. — Assertion-based verification can help both creators and integrators of silicon intellectual property (IP), according to panelists at a recent industry forum here. But guidelines on how to use assertions effectively are badly needed, the panelists said. Organized by the Accellera standards organization, the panel noted the verification challenges posed by the reuse of silicon IP. Moderator Victor Berman, director of languages and standards strategy at Cadence Design Systems Inc., said that while IP blocks may implement standard protocols, there are still hundreds of pos- sible variations in the finished design.