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FPGA DESIGNERS SEE SOME OF EDA'S BEST WORK IN 2007

机译:FPGA设计人员看到了EDA在2007年的最佳成果

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With so many designers making FPGAs their implementation vehicle of choice these days, it's inevitable that some of EDA's brightest minds would turn their attention to tools and methodologies targeted at getting the most out of these ever-more-capable devices. One of the more interesting launches was from GateRocket, a startup that has seen FPGAs rise in size and complexity to ASIC-like levels. With that evolution comes a host of ASIC-like verification issues. For FPGA designers, just as for ASIC designers, simulation is too slow.
机译:如今,由于有如此多的设计人员将FPGA选作实现工具,因此不可避免地,一些EDA最聪明的人会将注意力转移到旨在最大程度地利用这些功能越来越强大的器件的工具和方法上。 GateRocket是最有趣的产品之一,该公司已经看到FPGA的规模和复杂性都达到了类似ASIC的水平。随着这种发展,出现了许多类似ASIC的验证问题。对于FPGA设计人员而言,就像对ASIC设计人员一样,仿真速度太慢。

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