首页> 外文期刊>IEEE Transactions on Electron Devices >Process and device characterization for a 30-GHz f/sub T/ submicrometer double poly-Si bipolar technology using BF/sub 2/-implanted base with rapid thermal process
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Process and device characterization for a 30-GHz f/sub T/ submicrometer double poly-Si bipolar technology using BF/sub 2/-implanted base with rapid thermal process

机译:使用BF / sub 2 /注入基极并具有快速热处理的30 GHz f / sub T /亚微米双多晶硅双极技术的工艺和器件表征

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摘要

Process and device parameters are characterized in detail for a 30-GHz f/sub T/ submicrometer double poly-Si bipolar technology using a BF/sub 2/-implanted base with a rapid thermal annealing (RTA) process. Temperature ramping during the emitter poly-Si film deposition process minimizes interfacial oxide film growth. An emitter RTA process at 1050 degrees C for 30 s is required to achieve an acceptable emitter-base junction leakage current with an emitter resistance of 6.7*10/sup -7/ Omega -cm/sup 2/, while achieving an emitter junction depth of 50 nm with a base width of 82 nm. The primary transistor parameters and the tradeoffs between cutoff frequency and collector-to-emitter breakdown voltage are characterized as functions of base implant dose, pedestal collector implant dose, link-base implant dose, and epitaxial-layer thickness. Transistor geometry dependences of device characteristics are also studied. Based on the characterization results for poly-Si resistors, boron-doped p-type poly-Si resistors show significantly better performance in temperature coefficient and linearity than arsenic-doped n-type poly-Si resistors.
机译:对于使用BF / sub 2 /注入基极和快速热退火(RTA)工艺的30 GHz f / sub T /亚微米双多晶硅双极技术,详细描述了工艺和器件参数。发射极多晶硅膜沉积过程中的温度上升使界面氧化物膜的生长最小化。需要在1050摄氏度下进行30 s的发射极RTA处理,以达到可接受的发射极-基极结泄漏电流,且发射极电阻为6.7 * 10 / sup -7 / Omega -cm / sup 2 /,同时达到发射极结深50nm的基底宽度为82nm。晶体管的主要参数以及截止频率与集电极-发射极击穿电压之间的折衷关系是基极注入剂量,基极集电极注入剂量,连接基极注入剂量和外延层厚度的函数。还研究了器件特性的晶体管几何形状依赖性。根据多晶硅电阻器的表征结果,掺硼的p型多晶硅电阻器在温度系数和线性方面的性能显着优于掺砷的n型多晶硅电阻器。

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