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首页> 外文期刊>IEEE Transactions on Electron Devices >High-performance deep submicron CMOS technologies with polycrystalline-SiGe gates
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High-performance deep submicron CMOS technologies with polycrystalline-SiGe gates

机译:具有多晶SiGe栅极的高性能深亚微米CMOS技术

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摘要

The use of polycrystalline SiGe as the gate material for deep submicron CMOS has been investigated. A complete compatibility to standard CMOS processing is demonstrated when polycrystalline Si is substituted with SiGe (for Ge fractions below 0.5) to form the gate electrode of the transistors. Performance improvements are achieved for PMOS transistors by careful optimization of both transistor channel profile and p-type gate workfunction, the latter by changing Ge mole fraction in the gate. For the 0.18 /spl mu/m CMOS generation we record up to 20% increase in the current drive, a 10% increase in the channel transconductance and subthreshold swing improvement from 82 mV/dec to 75 mV/dec resulting in excellent "on"/"off" currents ratio. At the same time, NMOS transistor performance is not affected by gate material substitution.
机译:已经研究了使用多晶SiGe作为深亚微米CMOS的栅极材料。当用SiGe代替多晶Si(对于Ge分数低于0.5的硅)形成晶体管的栅电极时,证明了与标准CMOS工艺的完全兼容性。通过仔细优化晶体管的沟道轮廓和p型栅极功函数,可通过更改栅极中的Ge摩尔分数来实现PMOS晶体管的性能改进。对于0.18 / spl mu / m CMOS世代,我们记录了电流驱动高达20%的增加,通道跨导增加了10%,亚阈值摆幅从82 mV / dec改善到75 mV / dec,从而实现了出色的“开通” /“截止”电流比。同时,NMOS晶体管的性能不受栅极材料替代的影响。

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