Steep Switching Hybrid Phase Transition FETs (Hyper-FET) for Low Power Applications: A Device-Circuit Co-design Perspective–Part I

摘要

Hybrid-phase-transition FETs (Hyper-FETs) are recently proposed steep switching devices that utilize the phase transition materials (PTM) to achieve a boost in the ratio of ON ( ION) and OFF currents ( IOFF) . Prototypical demonstrations of the Hyper-FET have shown performance improvement in comparison with conventional transistors, which motivates the evaluation of its device-circuit design space. In part I, we analyze the device aspects establishing the effects of the resistivity and phase transition thresholds of the PTM on the characteristics of Hyper-FETs. Our analysis shows that the ratio of insulating and metallic state resistivity ( ρINS and ρMET, respectively) of the PTM needs to be higher than the ION/IOFF of its host transistor to achieve performance improvement in Hyper-FET. For a host transistor with IOFF=0.051μA/μm and ION=191.5μA/μm , ρMET<∼2×10−3Ω .cm and ∼7.5 Ω .cm <ρINS<20000Ω .cm is required to achieve proper device functionality with a boost in ION/IOFF . Additionally, we establish the ranges of phase transition thresholds that yield proper functionality of the Hyper-FETs considering different IOFF targets. The methodology of choosing appropriate PTM geometry to achieve the target device characteristics is also described. We show that with proper design, Hyper-FETs achieve 94% larger ION at iso- IOFF compared with a FinFET. We examine the circuit design aspects of Hyper-FET in part II.