Low-Leakage-Current DRAM-Like Memory Using a One-Transistor Ferroelectric MOSFET With a Hf-Based Gate Dielectric

摘要

The power consumption of capacitor leakage current, increase of the capacitor aspect ratio, and lack of higher dielectric constant $(kappa)$ material are the difficult challenges to downscaling dynamic random access memory (DRAM). This letter reports a new one-transistor ferroelectric-MOSFET (1T FeMOS) device that displays DRAM functions of a 5 ns switching time, $10^{12}$ on/off endurance cycles, and 30 times on/off retention windows at 5 s and 85 $^{circ}{rm C}$. A simple 1T process and a considerably low OFF-state leakage of $3times 10^{-12}~{rm A}/mu{rm m}$ were achieved. This novel device was achieved by applying ferroelectric ZrHfO gate dielectric to a p-MOSFET, which is fully compatible with existing high-$kappa$ CMOS processing.