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Reduced Asymmetric Memory Window Between Si-Based n- and p-FeFETs With Scaled Ferroelectric HfZrOₓ and AlON Interfacial Layer

机译:具有缩放铁电HFZRO1和ALON界面层的基于SI的N和P-FEFET之间的不对称存储器窗口。

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摘要

The Si-based n- and p-FeFET with 5-nm ferroelectric (FE) HfZrOx(HZO) and high-k AlON interfacial layer (IL) were fabricated for the comparison of memory characteristics and reliability. The memory window (MW) of 1.37 V and 1.25 V are obtained by the n- and p-FeFET respectively by applying pulses of +/- 3.8 V/ 50 mu s. The typical MW asymmetry for both types of FeFETs is significantly reduced which is attributed to the reduced remanent polarization (P-r) from the highly scaled HZO and the enhanced voltage drop across the HZO as well as the improved interfacial quality from the AlON IL. In addition, the p-FeFET demonstrates a MW of 1.02 V up to 10(5) cycles with a long pulse 10(-4)s, superior to that of the n-FeFET due to the mitigated hot-electrons induced hole generation. Furthermore, the p-FeFET shows comparable retention performance with the n-FeFET. These results indicate that the p-FeFET possesses the competence of future memory applications without adding process complexity and introducing new substrate material.
机译:制备具有5-NM铁电(Fe)HFZROX(HZO)和高k个ALON界面层(IL)的Si的N-和P-FEFET用于比较记忆特性和可靠性。通过施加+/- 3.8V /50μs的脉冲,通过N-和P-FEFET获得1.37V和1.25V的存储器窗口(MW)。两种类型的FFET的典型MW不对称性显着降低,这归因于来自高度缩放的HZO的再扩散极化(P-R)和跨越HZO的增强电压降,以及来自ALON IL的改善的界面质量。另外,P-FEFET通过减压热电子感应孔产生,具有长脉冲10(-4)S的长脉冲10(-4)S,长脉冲10(-4)S的MW,其MW为1.02V至10(5)个循环,而不是N-FEFET。此外,P-FEFET显示出与N-FEFET相当的保持性能。这些结果表明,P-FEFET具有未来内存应用的能力,而无需添加过程复杂性并引入新的基材材料。

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