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首页> 外文期刊>IEEE Electron Device Letters >High-Voltage and High-Current Id–Vds Measurement Method for Power Transistors Improved by Reducing Self-Heating
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High-Voltage and High-Current Id–Vds Measurement Method for Power Transistors Improved by Reducing Self-Heating

机译:通过减少自加热改善功率晶体管的高压和高电流ID-VDS测量方法

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摘要

In this letter, an improved measurement method for power transistors is proposed to obtain drain-current characteristics as a function of drain-source voltage (I-d-V-ds) in high-voltage and high-current (HVHC) ranges. A simple double pulse test (DPT) is utilized in our previous method. However, the self-heating of the device under test (DUT) is not ignorable in the range of high Id. The improved test circuit is equipped with an additional transistor connected in parallel to DUT in order to prevent the flow of a large current into DUT before the measurement. When a trench-gate type SiC MOSFET (Metal-Oxide-Semiconductor Field-Effect-Transistor) is used as a DUT, the power loss of the DUT decreases by about 80%. The transient thermal analysis shows that the die temperature rise is suppressed by up to 10 degrees C in about 200 A ranges. The newly obtained I-d-V-ds characteristics are utilized to model the SiC trench MOSFET. The device model reproduces the measured switching waveforms very accurately.
机译:在这封信中,提出了一种改进的功率晶体管的测量方法,以获得作为高压和高电流(HVHC)范围中的漏源电压(I-D-V-DS)的漏极电流特性。在先前的方法中使用简单的双脉冲测试(DPT)。然而,在高ID的范围内,在测试(DUT)下的自加热是不可知的。改进的测试电路配备有与DUT平行连接的附加晶体管,以防止在测量之前将大电流的流量流入DUT。当沟槽栅极型SiC MOSFET(金属氧化物 - 半导体场效应晶体管)用作DUT时,DUT的功率损耗降低约80%。瞬态热分析表明,在约200个范围内,芯片温度升高至多10℃。新获得的I-D-V-DS特性用于模拟SIC沟槽MOSFET。设备模型非常准确地再现测量的开关波形。

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