Altered Phase Velocity Lines for Low Crosstalk Microstrip Interconnection of High-Speed Digital Circuits: Design and Experimental Validation

摘要

Altered phase velocity lines are a novel kind of parallel microstrip lines for high-speed interconnection of digital circuits, on which the crosstalk is reduced by the different phase velocities of propagation on the adjacent lines. In this paper, a design method is proposed to optimize the geometry sizes of the altered phase velocity lines. The measured results of a prototype altered phase velocity pair designed by the proposed method are presented to validate the design method. And the effects of the process variation are simulated to analyze the robustness of the prototype in fabrication. The altered phase velocity lines outperform the symmetric parallel microstrip lines in terms of the lower far-end crosstalk (FrdCtk) and the lower dielectric loss. This technique reduces the FrdCtk in the pair of the microstrip transmission lines and does not significantly improve the near-end crosstalk. The prototype works at the speed of 2 Gbps for low crosstalk digital signal transmission, while it can transmit the high-speed clock signal at 10.5 GHz, so the altered phase velocity lines are a useful supplementary to the existing low crosstalk interconnection concepts in the scenario that the parallel microstrips have to be placed closely on printed circuit board.