Bus Expansion for Multiple Indistinguishable I~2C-Addressed Devices Using FET Bus Switches

摘要

An effective way to gain board space and increase compo-nent density is to minimize iring on the board. A widely used architecture that allows such minia- turization is the inter-integrated circuit (I~2C) bus. Comprised of only a bidirectional serial data line, SDA, and a unidirectional serial clock line, SCL, this bus requires no chip selects line and other additional connections. Therefore, the realization of the I~2C bus in a system simplifies routing and reduces design cycle time.