Real-time Hardware Implementation of ARM CoreSight Trace Decoder

Zeinolabedin Seyed Mohammad Ali; Partzsch Johannes; Mayr Christian

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Real-time Hardware Implementation of ARM CoreSight Trace Decoder

机译：ARM Coresight跟踪解码器的实时硬件实现

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《Design & Test of Computers, IEEE》 |2021年第1期|69-77|共9页
作者
Zeinolabedin Seyed Mohammad Ali; Partzsch Johannes; Mayr Christian;
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作者单位

Tech Univ Dresden TU Dresden Dresden Germany;

Tech Univ Dresden TU Dresden Chair Highly Parallel VLSI Syst & Neuromorph Circ Dresden Germany;

Tech Univ Dresden TU Dresden Elect Engn Dresden Germany;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
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5. Algorithms and hardware structures for real-time compression of program traces. [D] . Uzelac, Vladimir. 2010

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Real-time Hardware Implementation of ARM CoreSight Trace Decoder

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