An area-efficient FFT processor for the OFDMA transceiver communication system

摘要

Orthogonal frequency division multiplexing (OFDM) is a well-organized multiplexing scheme,which is long-established in recent wireless and communication standards. OFDM resembles asystem of exchanging information done with a nonflat channel calledDiscreteMulti-Tone modulation(DMT) and CodedOFDM(COFDM). The data stream in this frequency modulation is dividedacross narrowband channels to limit interference and crosstalk. One of the extreme needs ofOFDMis reasonable to be straightmeanwhile sending and receiving systems.OFDMis extremelypreferred for rapid data transmission and radio access method. In this paper, OFDM transceiveris carried out and implemented on FPGA. In addition, 128-point IFFT/FFT pipelined architectureis proposed with the aim of optimizing area, frequency, and circuit complexity.