An autonomic-computing approach onmapping threads to multi-cores for software transactional memory

摘要

A parallel program needs tomanage the trade-off between the time spent in synchronisation andrncomputation. This trade-off is significantly affected by its parallelism degree. A high parallelismrndegreemay decrease computing timewhile increasing synchronisation cost. Furthermore, threadrnplacement on processor coresmay impact programperformance, as the data access time can varyrnfrom one core to another due to intricacies of the underlying memory architecture. Alas, there isrnno universal rule to decide thread parallelism and its mapping to cores from an offline view, especiallyrnfor a program with online behaviour variation. Moreover, offline tuning is less precise.Wernpresent our work on dynamic control of thread parallelism and mapping.We address concurrencyrnissues via Software Transactional Memory (STM). STM bypasses locks to tackle synchronisationrnthrough transactions. Autonomic computing offers designers a framework of methods and techniquesrnto build autonomic systems with well-mastered behaviours. Its key idea is to implementrnfeedback control loops to design safe, efficient, and predictable controllers, which enable monitoringrnand adjusting controlled systems dynamically while keeping overhead low.We implementrnfeedback control loops toautomatemanagementof threads anddiminish programexecution time.