D~3 -Machinef A decoupled data-driven multithreaded architecture with variable resolution support

摘要

This paper presents the Decoupled Data-Driven machine (D~3-machine), a multithreaded architecture with data-driven synchronization. The D3-machine is an efficient and cost-effec- tive design that combines the advantages of the data-driven synchronization with those of Instruction Level Parallelism (ILP). Two major design ideas are utilized by the proposed model f asynchronous execution of synchronization and computation operations and multi- threaded graphs with variable resolution. The guiding principle in the generation of the threads is to fully exploit the ILP capabilities of the target processor. The entire dynamic Data-Flow (DF) graph is mapped by a one-to-one function onto the virtual space of the machine. Thus, the traditional DF graph operations (synchronization) of token matching and token formatting/routing are reduced into memory access operations. This allows us to utilize the dynamic DF principles, that exploit ultimate parallelism, for thread scheduling at a hardware minimal cost. With a combination of deterministic and stochastic simulation ex- periments is shown that the D3-machine has the necessary attributes for efficient parallel processing, it can tolerate long latencies, exploit parallelism, and also benefit from locality. Furthermore, by decoupling the synchronization portion of a thread from the computation, the D3-machine effectively neutralizes the overhead associated with dynamic DF scheduling.