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PipeRench: a reconfigurable architecture and compiler

机译:PipeRench:可重配置的体系结构和编译器

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With the proliferation of highly specialized embedded computer systems has come a diversification of workloads for computing devices. General-purpose processors are struggling to efficiently meet these applications' disparate needs, and custom hardware is rarely feasible. According to the authors, reconfigurable computing, which combines the flexibility of general-purpose processors with the efficiency of custom hardware, can provide the alternative. PipeRench and its associated compiler comprise the authors' new architecture for reconfigurable computing. Combined with a traditional digital signal processor, microcontroller or general-purpose processor, PipeRench can support a system's various computing needs without requiring custom hardware. The authors describe the PipeRench architecture and how it solves some of the pre-existing problems with FPGA architectures, such as logic granularity, configuration time, forward compatibility, hard constraints and compilation time.
机译:随着高度专业化的嵌入式计算机系统的普及,计算设备的工作负载变得多样化。通用处理器正在努力有效地满足这些应用程序的不同需求,而定制硬件几乎是不可行的。这组作者说,可重构计算将通用处理器的灵活性与定制硬件的效率相结合,可以提供替代方案。 PipeRench及其关联的编译器构成了作者用于可重新配置计算的新体系结构。与传统的数字信号处理器,微控制器或通用处理器结合使用,PipeRench可以支持系统的各种计算需求,而无需自定义硬件。作者介绍了PipeRench架构及其如何解决FPGA架构先前存在的一些问题,例如逻辑粒度,配置时间,前向兼容性,硬约束和编译时间。

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