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Low Power Digital Baseband for Impulse Radio Ultra-Wideband Transceiver

机译:用于脉冲无线电超宽带收发器的低功率数字基带

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摘要

In this paper, a low power digital baseband to be used together with impulse-radio ultra wideband radio frequency front-end has been presented. It can provide received pulse synchronization required for burst mode and low power operation. It also overcomes clock drift issue between different transceivers. The clock and data recovery is implemented fully in digital domain without the need of conventional phase-locked loop, delay locked loop or analog-to-digital converter. The chip is designed using 0.18 μm CMOS technology. It consumes 5 mW and can recover data up to 20 Mbps.
机译:本文提出了一种与脉冲无线电超宽带射频前端一起使用的低功率数字基带。它可以提供突发模式和低功耗操作所需的接收脉冲同步。它还克服了不同收发器之间的时钟漂移问题。时钟和数据恢复完全在数字域中实现,而无需传统的锁相环,延迟锁相环或模数转换器。该芯片采用0.18μmCMOS技术设计。它的功耗为5 mW,可以恢复高达20 Mbps的数据。

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