Rail-to-rail complementary input StrongARM comparator for low-power applications

摘要

This study proposes a new scheme for rail-to-rail input StrongARM latch comparator. Additional differential input p-type metal-oxide-semiconductor (PMOS) and cross-coupled n-type metal-oxide-semiconductor (NMOS) transistors have been introduced to achieve the rail-to-rail input range. The proposed scheme offers low-energy consumption of 15.2 fJ and a high speed of 3 GHz, which makes it attractive for energy harvested Internet of Thing applications. The proposed architecture is fabricated in 65 nm complementary metal-oxide-semiconductor (CMOS) technology and the functionality is verified using post-layout simulations and chip measurements.