67 dB SNDR 20 kHz BW SC third-order ΣΔΣΔ modulator with single Op-Amp and 20 µW power consumption for bio-medical applications

摘要

This paper presents a single loop 3rd order discrete-time Sigma-Delta Modulator (Sigma Delta M) using a single operational amplifier (Op-Amp). The proposed Sigma Delta M utilises delay-based discrete-time integrators and a single Op-Amp is used to implement all the integrators of the proposed design. The delay-based design helps in relaxing the settling time requirement of an integrator, also the error due to slewing in the output of the integrator is avoided. A switched capacitor Op-Amp based proposed design is simulated in standard 180 similar to nm CMOS technology with a resolution of 10.75 bitS Delta The proposed Sigma Delta M achieves a signal-to-noise-distortion ratio (SNDR) of 66.48 dB and dynamic range (DR) of 70 dB. An input signal of -4 dBFS magnitude at a frequency of 2.125 kHz is sampled with a sampling frequency of 1.024 MHz. The proposed circuit is designed for a bandwidth (BW) of 20 kHz with an over-sampling-ratio (OSR) of 25.6. The proposed modulator achieves a figure-of-merit (FOMS/FOMW) of 156.48 dB/0.290 (pJ/conversion-step) with the total power consumption of 20 mu W at 1.8 V supply voltage (VDD). A Monte-Carlo simulation for the SNDR of the proposed design is done and the achieved mean and standard deviation (SD) is 66.09 dB and 1.025 respectively for 1000 samples.