...
首页> 外文期刊>IEEE Transactions on Circuits and Systems. II, Express Briefs >Self-tested self-synchronization circuit for mesochronous clocking
【24h】

Self-tested self-synchronization circuit for mesochronous clocking

机译:用于同步时钟的自测自同步电路

获取原文
获取原文并翻译 | 示例
   

获取外文期刊封面封底 >>

       

摘要

In large-scale and high-speed systems, global synchronization hasnbeen commonly used to protect clocked I/O from data read failure causednby metastability. There are many drawbacks with global synchronization,nwhich will approach its physical limit in the future as system clocknfrequency and system scale increase simultaneously. Mesochronousnclocking overcomes these drawbacks, but without a proper delay or phasencontrol, a metastability problem occurs. Self-testednself-synchronization (STSS) was proposed to solve this problem. In thisnpaper, we describe two STSS methods, STSS-1 and STSS-2, implemented byntwo-phase input ports for parallel/serial data transfer. Measurements onna test chip for the two methods show that a data rate of 750 Mb/s isnreached with 3.6-V power supply in 0.6-Μm CMOS. Comparison is madenbetween STSS-1 and STSS-3
机译:在大规模和高速系统中,全局同步已普遍用于保护时钟I / O免受亚稳态引起的数据读取失败。全局同步有很多缺点,随着系统时钟频率和系统规模的同时增长,将来它将接近其物理极限。中同步时钟克服了这些缺点,但是没有适当的延迟或相位控制,就会出现亚稳性问题。为了解决这个问题,提出了自测自同步(STSS)。在本文中,我们描述了两种STSS方法,即STSS-1和STSS-2,它们由n个两相输入端口实现,用于并行/串行数据传输。在这两种方法的测试芯片上进行的测量表明,在0.6Mm CMOS中使用3.6V电源时,数据速率达750 Mb / s。在STSS-1和STSS-3之间进行比较

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号