Analysis of a Switched-Capacitor Second-Order Delta–Sigma Modulator Using Integrator Multiplexing

摘要

This brief investigates a switched-capacitor (SC) second-order delta-sigma modulator using integrator multiplexing with respect to component imperfections. The two integration operations, which are characteristic for a second-order system are accomplished by multiplexing two integration capacitors CU and CV onto a single operational amplifier. The two feedback loops are implemented utilizing two capacitors CA and CB, which are charged and discharged periodically. Crosstalk between the two integration capacitors CU and CV due to parasitic capacitances introduces additive white noise. However, the influence can easily be limited using standard SC technology. A mismatch between CA and CB introduces a dc-offset and a gain error, as derived quantitatively. As a consequence, the robustness to component imperfections, which is typical for second-order delta-sigma modulators, is maintained. It is shown that in principle, integrator multiplexing can be generalized for higher order delta-sigma modulators