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机译:适用于40nm CMOS的0.068 PJ / B / DB 1.62至10 GB / S低功耗接收器的自适应胶印机和共用夏季自适应DFE
Seoul Natl Univ Dept Elect & Comp Engn Seoul 08826 South Korea|Seoul Natl Univ Interuniv Semicond Res Ctr Coll Engn Seoul 08826 South Korea;
Seoul Natl Univ Dept Elect & Comp Engn Seoul 08826 South Korea|Seoul Natl Univ Interuniv Semicond Res Ctr Coll Engn Seoul 08826 South Korea;
Seoul Natl Univ Dept Elect & Comp Engn Seoul 08826 South Korea|Seoul Natl Univ Interuniv Semicond Res Ctr Coll Engn Seoul 08826 South Korea;
SK Hynix Icheon 17336 South Korea;
Korea Elect Technol Inst Seongnam 13509 South Korea;
Univ Calif Berkeley Dept Elect Engn & Comp Sci Berkeley CA 94720 USA;
Alphasolutions Inc Seongnam 13530 South Korea;
Seoul Natl Univ Dept Elect & Comp Engn Seoul 08826 South Korea|Seoul Natl Univ Interuniv Semicond Res Ctr Coll Engn Seoul 08826 South Korea;
Decision feedback equalizers; Image edge detection; Hardware; Adaptive equalizers; Engines; Power demand; Receiver; DC offset; offset cancellation; mismatch; equalizer; DFE; summer; adaptation; adaptive equalizer;
机译:一个0.1-pj / b / db 1.62至-108-gb / s视频接口接收器,带有联合自适应CTL和DFE,使用偏置数据级参考
机译:具有32 nm SOI CMOS技术的DFE接收器的1.4 pJ / bit,可扩展功率的16×12 Gb / s源同步I / O
机译:0.31pJ / bit 20-Gb / s DFE,带有1个离散抽头和2个IIR滤波器,反馈在40nm-LP CMOS中
机译:3.2多标准185fs
机译:具有自适应盲DFE的4Gbps CMOS背板接收器。
机译:用于低功耗互连的40-NM CMOS中的52 GB / S子1-PJ /位PAM4接收器