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One electron-based smallest flexible logic cell

机译:一个基于电子的最小柔性逻辑单元

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A one electron-based operating half-adder, the smallest arithmetic block, has been implemented on silicon-on-insulator structure whose basic element is a nanoscale single-electron transistor (SET) with two symmetrical side-wall gates. Grayscale contour plots of the resulting cell output voltages exhibit the Coulomb blockade-induced periodic alternating high/low features. Their voltage transfer characteristics display typical Sum and Carry-Out functions for binary, multi-valued (MV), and binary-MV mixed input voltages. Moreover, the half-adder function converts into a subtraction mode by adjusting control gates of the SET element. This flexible multi-valued cell provides an arithmetic block for the SET MV logic family of high density integration, operating with ultra-low power.
机译:已经在绝缘体上硅结构上实现了一个基于电子的半加法器(最小的算术模块),该结构的基本元素是具有两个对称侧壁门的纳米级单电子晶体管(SET)。所得电池输出电压的灰度轮廓图显示出库仑封锁诱导的周期性交替的高/低特征。它们的电压传输特性显示了二进制,多值(MV)和二进制MV混合输入电压的典型求和和进位功能。此外,半加法器功能通过调整SET元素的控制门转换为减法模式。这种灵活的多值单元为SET MV逻辑系列的高密度集成提供了运算模块,并以超低功耗运行。

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