Mechanisms of thermally induced threshold voltage instability in GaN-based heterojunction transistors

摘要

In this work, we attempt to reveal the underlying mechanisms of divergent V-thermal-stabilities in III-nitride metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) and MOS-Channel-HEMT (MOSC-HEMT). In marked contrast to MOSC-HEMT featuring temperature-independent V, MIS-HEMT with the same high-quality gate-dielectric/III-nitride interface and similar interface trap distribution exhibits manifest thermally induced V shift. The temperature-dependent V of MIS-HEMT is attributed to the polarized III-nitride barrier layer, which spatially separates the critical gate-dielectric/III-nitride interface from the channel and allows “deeper” interface trap levels emerging above the Fermi level at pinch-off. This model is further experimentally validated by distinct V-driven Fermi level movements at the critical interfaces in MIS-HEMT and MOSC-HEMT. The mechanisms of polarized III-nitride barrier layer in influencing V-thermal-stability provide guidelines for the optimization of insulated-gate III-nitride power switching devices.