A second-order multi-bit ΣΔ modulator with on-line calibration and digital correction of the digital-to-analog converter mismatches

摘要

This paper presents a novel technique for on-line calibration and digital correction of the mismatches among the elements of the digital-to-analog converter (DAC) used in the feedback loop of multi-bit sigma–delta (ΣΔ) modulators. The proposed method, with an extremely limited amount of additional circuitry, allows the mismatches among the elements of the DAC to be accurately measured and corrected in the digital domain, thus improving the linearity performance of the modulator. A switched capacitor (SC) 4-bit second-order ΣΔ modulator has been implemented to validate the proposed solution. The experimental results confirm that the proposed technique allows us to achieve an improvement in the spurious-free dynamic range of the ΣΔ modulator as large as 26 dB. Keywords Sigma–delta modulator - A/D converter - Digital-to-analog converter - On-line calibration